feat(13e6): cut panel power rail in deep sleep via PIN_PWR + GPIO hold
The Waveshare board exposes PIN_PWR (GPIO 1) specifically so battery
designs can gate the panel rail between refreshes. Before this commit
PIN_PWR was driven HIGH at boot and never released, so the panel's
boost converter kept its quiescent draw (50–500 µA) through every
deep sleep. The e-ink particles are bistable so the displayed image
persists without VDD; dropping the rail is a free win.
Three pieces:
• epd_sleep() drives PIN_PWR LOW after issuing the panel-internal
DEEP_SLEEP command, then gpio_hold_en() latches the level so it
survives the chip's RTC transition.
• normal_operation_impl() calls gpio_deep_sleep_hold_en() just
before esp_deep_sleep_start() so the per-pin hold extends through
the deep sleep period itself (without this the holds release on
the transition and the rail comes back up).
• epd_setup_pins() calls gpio_hold_dis() at the very top to free
PIN_PWR on wake before re-driving it HIGH; no-op on cold boot.
Tests: 47/47 pass. Added test/mocks/driver/gpio.h with no-op stubs so
the native test build links cleanly.
Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
This commit is contained in:
@@ -24,6 +24,7 @@
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#include <qrcode.h>
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#include <esp_task_wdt.h>
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#include <esp_heap_caps.h>
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#include <driver/gpio.h>
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static constexpr uint16_t W = 1200;
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static constexpr uint16_t H = 1600;
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@@ -103,6 +104,12 @@ static void panel_reset() {
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}
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void epd_setup_pins() {
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// Release the PIN_PWR hold latched from the previous deep sleep so we
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// can drive it again. No-op on cold boot (nothing was held). Paired
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// with gpio_hold_en() in epd_sleep() and gpio_deep_sleep_hold_en() in
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// operation.h.
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gpio_hold_dis((gpio_num_t)PIN_PWR);
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pinMode(PIN_PWR, OUTPUT);
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pinMode(PIN_RST, OUTPUT);
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pinMode(PIN_DC, OUTPUT);
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@@ -191,6 +198,16 @@ void epd_sleep() {
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SPI.transfer(0xA5); // sentinel
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cs_both(HIGH);
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s_initialized = false;
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// Cut the panel power rail. The Waveshare board exposes PIN_PWR
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// specifically for battery operation — the e-ink image persists
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// without VDD (particles are bistable), and dropping the rail kills
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// the boost converter's quiescent draw (~50–500 µA depending on the
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// load on the rail). Latch LOW so it survives deep sleep; paired with
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// gpio_deep_sleep_hold_en() in operation.h just before the chip
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// enters sleep.
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digitalWrite(PIN_PWR, LOW);
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gpio_hold_en((gpio_num_t)PIN_PWR);
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}
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// ── Draw helpers ───────────────────────────────────────────────────────────────
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