fix(13e6): yield to scheduler during bit-banged SPI push

Bit-banged SPI runs a multi-second tight loop (~480000 byte sends per
half × 8 GPIO toggles per byte). Without periodic scheduler yields the
interrupt watchdog can bite during a full-frame push, especially with
PSRAM-backed reads adding cache-miss latency. Adds esp_task_wdt_reset()
+ vTaskDelay(0) every ~4 KB in epd_fill and every 8 rows in
push_full_frame so the WDT stays fed and other FreeRTOS tasks get a turn.

Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>

src/panels/waveshare13e6/v1/epd_driver.cpp

@@ -243,9 +243,13 @@ static void push_full_frame(const uint8_t* fb) {
             for (uint16_t x = 0; x < HALF_BYTES_ROW; x++) {
                 spi_write_byte(row[x]);
             }
-            // Yield to the watchdog every ~16 rows so it doesn't reset us
-            // during the multi-second per-half push.
-            if ((y & 0x0F) == 0) esp_task_wdt_reset();
+            // Yield to scheduler (and feed the watchdog) every 8 rows
+            // so neither the task WDT nor the interrupt WDT bites during
+            // the multi-second bit-banged push.
+            if ((y & 0x07) == 0) {
+                esp_task_wdt_reset();
+                vTaskDelay(0);
+            }
         }
         cs(cs_pin, HIGH);
     }
@@ -263,7 +267,10 @@ void epd_fill(uint8_t color) {
         begin_cmd(p, 0x10);
         for (size_t i = 0; i < (size_t)HALF_BYTES_ROW * H; i++) {
             spi_write_byte(byte);
-            if ((i & 0x1FFF) == 0) esp_task_wdt_reset();
+            if ((i & 0x0FFF) == 0) {
+                esp_task_wdt_reset();
+                vTaskDelay(0);
+            }
         }
         cs(p, HIGH);
     }